LES (.les) is the native schematic file format of the SchematicEditor. One LES file can hold an entire design: multiple sheets, their placements, wires, ports, annotation graphics, and—when hierarchy is used—embedded component definitions (symbols, parameters, netlist/model templates, layout recipes) via sheetComponent / SubComponent.
Reusable shared libraries remain in LEL. LES stores sheet content plus, for hierarchy, self-contained copies of internal components.
LES looks like XML but is a custom tag format: many tags are opening-only (no closing tag), attribute order is fixed, and parsing is done by string search—not by a general XML parser. Prefer files written by File → Save; when editing by hand, keep a backup and reopen in the SchematicEditor to validate.
<LayoutEditorSchematic> … </LayoutEditorSchematic> block is scanned; inside it, every <Sheet …> is loaded.SubComponent definitions must therefore appear before any placement that references them (Save enforces this).name / lib parameters. Internal components (-internal-) are created from preceding SubComponent blocks in the same file.<LayoutEditorSchematic> containing all sheets of the current schematic.sheetComponent is saved before any sheet that places that component. Parent sheets that still need an unsaved internal dependency are deferred until the dependency is written.<Sheet componentName> that contains only the embedded <SubComponent> definition so the hierarchy remains loadable.componentName + libraryBase. Only internal hierarchy (-internal-) or a Link to an external sheet component is embedded.| Content | How it appears |
|---|---|
| Multiple sheets | Multiple <Sheet name> blocks in one file |
| Placements | <Component>, <Instance>, <VectorInst> |
| Connectivity | <Wire>, <Bus>, <Port>, <Busport>, <LabelWire>, <Ground> |
| Drawing (non-electrical) | <Line>, <Polygon>, <Circle>, <Rect>, <Arc>, <Text> |
| Hierarchy / sheet as component | Sheet owns a sheetComponent; saved as <SubComponent> inside that sheet; parents place it with library -internal- |
| Symbols inside the schematic | Inside <SubComponent> → <Symbol index> (same graphics tags as LEL symbols) |
| Link to external library component as sheet interface | <SubComponent> containing only <Link comp …> |
Field values that are encoded with putString / decoded with getString use these replacements (same idea as LEL):
| Character / value | Stored form |
|---|---|
| space | &sp; |
< |
< |
> |
> |
" |
"e; |
' |
’ |
| newline | &newline; |
| empty string | |
Applies to names, library names, port/text/label strings, instance parameter names/values, link fields, and similar single-token fields.
Not entity-encoded (written as raw multi-line text): bodies of Description, Layout, Label, Netlist, Model, ExtractionParameter, ExtractionDeviceParameter.
Colors on graphic tags: the special name wire means the current schematic wire color; otherwise a Qt named color is used (typically #rrggbb).
Coordinates are integers in schematic units. Point lists are space-separated x y pairs.
<LayoutEditorSchematic>
<Sheet sheetName>
… sheet elements …
… optional SubComponent …
</Sheet>
<Sheet otherSheet>
…
</Sheet>
</LayoutEditorSchematic>
<LayoutEditorSchematic>Root container of a LES file.
<Sheet> blocks (and only those are used on open).<Sheet sheetName>One circuit sheet.
sheetName — text between Sheet and > (trimmed). This is the sheet title shown in the SchematicEditor. Save writes it without entity encoding; avoid ambiguous special characters in hand-edited names.SubComponent association for this sheet’s sheetComponent.-internal- components.<Wire x1 y1 [x2 y2 …]>Electrical wire polyline.
<Wire 0 136 18 136><Bus x1 y1 [x2 y2 …]>Bus polyline (multi-bit connection).
Wire — point list.Bus search also matches the prefix of Busport; tags whose remaining field text starts with port are skipped here and handled by Busport.<Port x y name [global|local] [type] [symbolName]>Sheet hierarchy pin (scalar port).
x, y — position name — encoded port name global — marks a global port; if type/symbol follow and the port is not global, Save writes the placeholder local type — encoded port type symbolName — encoded alternate symbol name for the port graphic <Port 142 -6 out>, <Port 0 -22 VDD global><Busport x y name [type] [symbolName]>Sheet bus port.
x, y, encoded name, then optional encoded type and symbolName.A[3:0] style conventions follow the SchematicEditor bus rules.<Ground x y>Ground marker / ground connection helper at a point.
x, y.<LabelWire x y [labelOffsetX labelOffsetY] [fontSize] name>Named net label (Label Node) at a position.
x, y — attachment / base position labelOffsetX labelOffsetY — written when the offset is non-zero or a non-zero font size is used fontSize — written only when non-zero name — encoded net name (always last) <LabelWire 337 -28 out><Component x y labelOffX labelOffY angle mirror componentName libraryName […more placements…]> … </Component>Placement of a library or internal component.
x, y — position labelOffX, labelOffY — instance label offset angle — rotation in degrees (as written by Save) mirror — 0 or 1 (mirror about X as used by the writer) componentName — encoded component type name libraryName — encoded library base name; use -internal- for hierarchical components defined in this LES file x y labelOffX labelOffY angle mirror) without repeating name/library.parameter=value (encoded). Save always writes devicename=… first, then other instance parameters.name and lib set to the missing identity.Example:
<Component 48 136 -15 7 0 0 INV openCellLibrary>
devicename=L4
output=X1
</Component>
Hierarchical use of a sheet component:
<Component -119 140 -16 6 0 0 delay -internal->
devicename=sub1
</Component>
<Instance> … </Instance>Alternate placement form used when a placement has a non-empty port vector map (bus-port remapping).
<Instance>: none.<InstComponent …> — same field list and name=value body as <Component>, closing </InstComponent><InstPort portName connectionName> — opening-only; encoded port name and mapped connection name (written for bus ports)<Component> when port vectors exist).<InstComponent …> / <InstPort …>See <Instance>. Same placement grammar as <Component>; InstPort is opening-only.
<VectorInst startIndex endIndex> … </VectorInst>Vector / array instance of a component over an inclusive index range.
startIndex, endIndex (integers).<VectorComponent …> — same as <Component> placement + parameter body <VectorPort portName connectionName> — opening-only bus/port mapping for the vector <VectorComponent …> / <VectorPort …>See <VectorInst>.
These draw on the sheet but are not wires/buses. Field patterns match the same primitives inside symbols.
<Line x1 y1 [x2 y2 …] color>Polyline graphic.
color (wire or #rrggbb / named color).<Polygon x1 y1 [x2 y2 …] color>Filled polygon. New polygons are normally closed by repeating the first point at the end.
color.<Circle x1 y1 x2 y2 color>Circle defined by opposing corners of its bounding box.
color.<Rect x1 y1 x2 y2 color>Axis-aligned rectangle by two opposing corners.
color.<Arc x1 y1 x2 y2 x3 y3 [more pairs…] color>Arc. Geometry is defined by points (center / start / end style as used by the schematic arc element); Save writes the point array plus color.
color.<Text x y size [rotation] color text>Annotation text.
x, y size — always written (may be 0) rotation — degrees; written only if non-zero color text — encoded string sheetComponent and <SubComponent>A sheet may be turned into a reusable hierarchical component (Use As Component). That association is the sheet’s sheetComponent:
-internal-), the full component definition is written inside the sheet as <SubComponent name>…</SubComponent> (same content as a LEL <Component>, with the outer tag renamed).<Component … name -internal->.<SubComponent sheetComponentName>
<Link comp componentName libraryBase>
</SubComponent>
On open, Link resolves sheetComponent to the existing library component instead of embedding a full definition.
Save ordering guarantees that the sheet (or synthetic sheet) that defines an internal SubComponent appears in the file before placements that use it.
<SubComponent name> … </SubComponent>Embedded component definition or link, stored inside a <Sheet>.
name (the internal/hierarchical type name).Link (and optionally reduced linked content).sheetComponent pointer is set accordingly.<SubComponent> (embedded component)These tags are the same family used in LEL component definitions. In LES they appear when hierarchy embeds a full symbol/netlist definition.
<Description> … </Description>Free-text description of the component (raw text, not entity-encoded).
<Parameter> … </Parameter>Parameter declarations for the component type.
<…> declaration:| Declaration | Meaning |
|---|---|
<string name [default]> |
String parameter; optional encoded default |
<int name [default]> |
Integer parameter (reader also accepts legacy integer; writer uses int) |
<double name [default]> |
Floating-point parameter |
<list name value1 value2 …> |
Choice list; values encoded. With pcbPackage=true, list contents come from the PCB catalog at runtime |
Option lines (plain text, not XML tags), attached to the preceding declaration:
| Option | Meaning |
|---|---|
callback=… |
Callback identifier/script hook |
unit=… |
Unit label |
info=… |
Help / info text |
edit=… |
Edit policy / UI hint |
display=… |
Display hint |
parse=true |
Value is a formula/expression to parse (true / True / TRUE / t) |
parseAsNum=false |
Do not force numeric parse (false / False / FALSE / f) |
multiplier=true |
Multiplier-style parameter |
pcbPackage=true |
Parameter selects a PCB package from the catalog |
<Layout> … </Layout>Layout recipe text for schematic-driven layout (raw multi-line recipe: cell/OA/ignore rules, etc.).
<Prefix prefix>Device-name prefix used when generating instance names / netlists.
_ when the prefix is empty.<Label> … </Label>Label template shown next to placements (raw text; may contain $devicename, $value, other $parameters).
<Symbol [index]> … </Symbol>One symbol graphic for the component.
index (symbol slot; writer uses 0, 1, …). Empty field is treated as index 0.Symbol blocks are allowed for multi-symbol components.<Symbol> pair.<Offsetlabel angle offsetX offsetY>Default label offset for a given placement angle.
angle (degrees key), offsetX, offsetY.<netlistFromSchematic/>Self-closing marker. When present, netlist/model data for hierarchy are generated from the schematic content of the defining sheet.
<Netlist formatName> … </Netlist>Netlist template for a named format (e.g. spice, hspice, spectre).
formatName (not entity-encoded as a whole token in the usual writer path; keep simple identifiers).$devicename, $node(port), …).<Model formatName> … </Model>Model / subcircuit template for a named format.
Netlist.<Extraction method> … </Extraction>Device extraction configuration.
method name.<ExtractionParameter> … </ExtractionParameter>Raw extraction parameter text inside Extraction.
<ExtractionDeviceParameter> … </ExtractionDeviceParameter>Raw device-parameter text inside Extraction.
<Proc formInitProc doneProc>Optional macros/procedures: form-init and done handlers.
<OaStoreLayoutOnly true|false>OpenAccess option: store layout only.
true or false.<Link comp componentName libraryBase>Links the sheet’s sheetComponent to an existing library component instead of embedding a full definition.
comp, then encoded componentName, then encoded libraryBase.SubComponent).In full LEL-style linked components, Link may appear together with Parameter / Prefix; the LES sheet association form typically writes the short SubComponent+Link variant shown above.
<Symbol>Parsed line-by-line. Supported tags (same field rules as the sheet graphics / ports of the same name):
| Tag | Role inside a symbol |
|---|---|
<Line …> |
Graphic polyline |
<Polygon …> |
Filled polygon |
<Circle …> |
Circle |
<Rect …> |
Rectangle |
<Arc …> |
Arc |
<Text …> |
Text |
<Port …> |
Symbol pin (supports global / type / symbolName) |
<Busport …> |
Symbol bus pin |
Not loaded inside Symbol: Wire, Bus, Ground, LabelWire, placements, SubComponent.
Example fragment:
<Symbol>
<Rect -40 -7 40 7 wire>
<Port -50 0 in>
<Line -50 0 -40 0 wire>
<Text -50 0 wire in>
<Port 50 0 out>
</Symbol>
<LayoutEditorSchematic>
<Sheet main>
<Component 0 0 0 0 0 0 INV openCellLibrary>
devicename=I1
</Component>
<Port -40 0 in>
<Port 40 0 out>
<Wire -40 0 -20 0>
<Wire 20 0 40 0>
</Sheet>
</LayoutEditorSchematic>
<LayoutEditorSchematic>
<Sheet delay>
… child schematic graphics / ports …
<SubComponent delay>
<Description>
created from sheet 'delay'
</Description>
<Parameter>
</Parameter>
<Layout>
[ignore]
*
</Layout>
<Prefix sub>
<Label>
delay
$devicename
</Label>
<Symbol>
… pins and drawing …
</Symbol>
<netlistFromSchematic/>
… optional Netlist / Model …
</SubComponent>
</Sheet>
<Sheet main>
<Component 0 0 0 0 0 0 delay -internal->
devicename=sub1
</Component>
…
</Sheet>
</LayoutEditorSchematic>
Child/SubComponent sheets are saved before parents that instantiate them.
| Format | Role vs LES |
|---|---|
| LEL | Shared reusable component libraries (symbols + recipes). LES references them by name/library. |
| LTspice / xschem / Qucs / KiCad / Eagle / EDIF | Imported or opened via converters; everyday native Save for SchematicEditor work is LES. |
Component numeric fields; angle/mirror semantics follow the writer/reader pair.SubComponent for design-local hierarchy.